In recent years, as solid-state image pickup units, CMOS (Complementary Metal-Oxide-Semiconductor) image sensors are used for various applications as an alternative to CCDs (Charge-Coupled Devices). For example, the number of cases where the CMOS image sensor is used as a solid-state image pickup unit mounted in a digital still camera, a digital camcorder, a surveillance camera, a camera for broadcasting, movie making, or business use, or a camera built in a cellular phone has increased. This is caused by a remarkable improvement in image quality of the CMOS image sensors in addition to advantages of higher-speed shooting (higher frame rate), lower power consumption, and the like, compared to the CCDs. Moreover, the CMOS image sensors have an advantage in that a pixel section in which unit pixels (hereinafter simply referred to as “pixels”) are arranged in an array and a peripheral circuit section are allowed to be fabricated on a same semiconductor substrate.
In the CMOS image sensors, a typical pixel includes a photodiode (hereinafter referred to as “PD”) configuring a photoelectric conversion section (a charge storage section) and a floating diffusion region section (hereinafter referred to as “FD region section”) that converts a photo-charge (hereinafter simply referred to as “charge”) generated in the PD into a voltage. The pixel further includes various pixel transistors to read a charge stored in the PD.
In recent years, four-transistor pixels each including a transfer transistor, an amplification transistor, a reset transistor, and a selection transistor are frequently used. However, three-transistor pixels not including the selection transistor may be used for miniaturization of pixels.
It is to be noted that the transfer transistor is a pixel transistor that transfers a charge stored in the PD to the FD region section, and the amplification transistor is a pixel transistor that amplifies a voltage signal converted by the FD region section. Moreover, the reset transistor is a pixel transistor that resets a potential of the FD region section, and the selection transistor is a pixel transistor that selects a pixel from which a charge is to be read.
In a digital still camera or the like including the CMOS image sensor with the above-described configuration, demands for an increase in pixel number and a reduction in enclosure size are met by reducing a cell size of the pixel. As an effective technique of reducing the cell size of the pixel, for example, a pixel sharing technology is used. In the pixel sharing technology, pixel transistors except for the transfer transistor and the FD region section are shared among a predetermined number of pixels (for example, two pixels, four pixels, or the like), and the transfer transistor and the PD are provided to each of the pixels.
For example, in a case of sharing between two pixels, the pixel transistors except for the transfer transistor and the FD region section are shared between the two pixels, and the transfer transistor and the PD are provided to each of the pixels. In this case, five pixel transistors (the amplification transistor, the reset transistor, the selection transistor, and the two transfer transistors) in total are provided to the two sharing pixels. In a case where the pixel sharing technology is not used, four pixel transistors are necessary for each pixel; however, in a case where the pixel transistors are shared between two pixels in the above-described manner, the number of pixel transistors per pixel is 2.5 (=5/2). Therefore, in the case where the pixel sharing technology is used, a formation area of the pixel transistors is allowed to be reduced, and the cell size of the pixel is allowed to be reduced accordingly. Moreover, in this case, a formation area of the PD is allowed to be increased by a reduction in the formation area of the pixel transistors.
Moreover, in the digital still camera or the like including the CMOS image sensor with the above-described configuration, to allow an image to be shot with higher image quality in an environment in which shooting conditions are poor, for example, a dark environment, an improvement in sensitivity is in increasing demand. To meet this demand, a back side illumination (BSI) type CMOS image sensor in which light is incident from a surface (a back surface) opposite to a front surface where a pixel transistor, wiring, and the like are formed of a silicon substrate is proposed. It is to be noted that a CMOS image sensor in which light is incident from a front surface where a pixel transistor, wiring, and the like are formed of a silicon substrate is referred to as “front side illumination (FSI) type CMOS image sensor”. In the back side illumination type CMOS image sensor, light is incident on the PD not through formation layers of a pixel transistor, wiring, and the like; therefore, vignetting of incident light in the pixel transistor, the wiring, and the like is allowed to be prevented. As a result, in the back side illumination type COMS image sensor, effects such as an improvement in sensitivity and an improvement in shading characteristics are obtained.
Incidentally, in a typical CMOS image sensor, it is known that a depth (hereinafter referred to as “photoelectric conversion depth”) from a light incident surface where photoelectric conversion is performed on incident light in a silicon substrate where light is incident differs depending on a wavelength of incident light. More specifically, it is known that the photoelectric conversion depth in the silicon substrate increases in order of blue light, green light, and red light. In other words, the photoelectric conversion depth for blue light in the silicon substrate is smaller than each of the photoelectric conversion depths for green light and red light.
There is proposed a back side illumination type CMOS image sensor using the above-described difference in photoelectric conversion depth among respective colors and using the pixel sharing technology. Moreover, in the CMOS image sensor with such a configuration, various layout technologies of a shared pixel transistor are proposed (for example, refer to PTL 1).
In PTL 1, there is proposed a technology in which a pixel transistor shared among pixels for blue, green, and red (hereinafter referred to as “blue pixel”, “green pixel”, and “red pixel”, respectively) is selectively arranged in a formation region of the blue pixel on a surface of a silicon substrate. The photoelectric conversion depth in the blue pixel (a PD formation position) is shallow from a light incident surface (a back surface); therefore, even if the shared pixel transistor is selectively arranged in the formation region of the blue pixel as with PTL 1, a photoelectric conversion action in the blue pixel is not adversely affected.
Therefore, in such a configuration in PTL 1, it is not necessary to arrange, in formation regions of the green pixel and the red pixel, the pixel transistor shared among the blue pixel, the green pixel, and the red pixel, and an area of the PD that performs a photoelectric conversion operation is allowed to be increased accordingly. In other words, in PTL 1, the area of the PD, an saturation signal amount, sensitivity, and the like are increased by allowing sharing pixels to have the above-described configuration, and miniaturization of pixels and single-chip color solid-state image pickup with high sensitivity and low noise are allowed to be achieved accordingly.